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ltc4160/ltc4160-1 1 41601fa typical application description switching power manager with usb on-the-go and overvoltage protection the ltc ? 4160/ltc4160-1 are high effciency power man - agement and li-ion/polymer battery charger ics. they each include a bidirectional switching powerpath? controller with automatic load prioritization, a battery charger, and an ideal diode. the ltc4160/ltc4160-1s bidirectional switching regulator transfers nearly all of the power available from the usb port to the load with minimal loss and heat which eases thermal constraints in small spaces. these devices feature a precision input current limit for usb compatibility and bat-track output control for effcient charging. in addition, the ics can also generate 5v at 500ma for usb on-the- go applications. an overvoltage circuit protects the ltc4160/ltc4160-1 from high voltage damage on the usb/wall adapter inputs with an external n-channel mosfet and a resistor. the ltc4160/ltc4160-1 are available in a 3mm 4mm 0.75mm qfn surface mount package. l , lt, ltc, ltm, linear technology, burst mode and the linear logo are registered trademarks and powerpath and bat-track are a trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents including 6522118, 6404251. other patents pending. features applications n bidirectional switching regulator makes optimal use of limited power available from usb port and also provides a 5v output for usb on-the-go n overvoltage protection guards against damage n 180m internal ideal diode plus optional external ideal diode controller seamlessly provides low loss powerpath when input power is limited or unavailable n instant-on operation with discharged battery n full featured li-ion/polymer battery charger n bat-track? adaptive output control for effcient charging n 1.2a max input current limit n 1.2a max charge current with thermal limiting n battery float voltage: 4.2v (ltc4160), 4.1v (ltc4160-1) n low battery powered quiescent current (8a) n 20-pin 3mm 4mm 0.75mm qfn package n media players and personal navigation devices n digital cameras, pdas, smart phones battery and v bus currents vs load current high effciency power manager/battery charger with usb on-the-go and overvoltage protection v bus usb usb on-the-go 3.3h 10f 0.1f 3.01k 1k 41601 ta01a clprog prog ltc4160/ ltc4160-1 sw v out bat li-ion + ovgate ovsens optional overvoltage protection system load 6.2k 10f load current (ma) 0 current (ma) 250 500 750 800 41601 ta01c 0 ?250 ?500 200 400 600 1000 v bus current battery current (charging) v bus = 5v bat = 3.8v 5x mode battery current (discharging) usb otg v bus voltage vs v bus current v bus current (ma) 0 v bus (v) 4.5 5.0 5.5 41601 ta01b 4.0 3.5 3.0 200 400 600 100 300 500 700 v bus = 4.75v i vbus = 500ma v out = bat = 3.8v usb 2.0 specifications require that high power devices not operate in this region
ltc4160/ltc4160-1 2 41601fa pin configuration absolute maximum ratings v bus (transient) t < 1ms, duty cycle < 1% .. C 0.3v to 7v v bus (static), bat, v out , ntc, enotg, id, encharger, vbusgd, fault, chrg ......... C 0.3v to 6v i lim0 , i ilim1 ........ C 0.3v to max(v bus , v out , bat) + 0.3v i ovsens ................................................................... 10ma i clprog .................................................................... 3ma i chrg , i vbusgd , i fault ............................................. 50ma i prog ........................................................................ 2ma i ldo3v3 ................................................................... 30ma i sw , i ba t , i vout , i vbus .................................................. 2a operating temperature range .................. C 40c to 85c maximum junction temperature ........................... 125c storage temperature range ................... C 65c to 125c (notes 1, 2, 3) 20 19 18 17 7 8 top view 21 gnd udc package 20-lead (3mm 4mm) plastic qfn 9 10 6 5 4 3 2 1 11 12 13 14 15 16 ovgate ovsens vbusgd fault id enotg i lim1 i lim0 sw v bus v out bat ntc ntcbias ldo3v3 clprog encharger prog chrg idgate t jmax = 125c, ja = 43c/w exposed pad (pin 21) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking package description temperature range ltc4160eudc #pbf ltc4160eudc #trpbf lfxy 20-lead (3mm 4mm) plastic qfn C40c to 85c ltc4160eudc-1 #pbf ltc4160eudc-1 #trpbf lfxz 20-lead (3mm 4mm) plastic qfn C40c to 85c ltc4160epdc #pbf ltc4160epdc #trpbf fdrt 20-lead (3mm 4mm) plastic utqfn C40c to 85c (obsolete) ltc4160epdc-1 #pbf ltc4160epdc-1 #trpbf fdst 20-lead (3mm 4mm) plastic utqfn C40c to 85c (obsolete) consult ltc marketing for parts specifed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based fnish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifcations, go to: http://www.linear.com/tapeandreel/ electrical characteristics symbol parameter conditions min typ max units powerpath switching regulator C step-down mode v bus input supply voltage 4.35 5.5 v i bus(lim) total input current 1x mode 5x mode 10x mode suspend mode l l l l 82 440 900 0.32 90 480 955 0.43 100 500 1000 0.5 ma ma ma ma i vbusq (note 4) input quiescent current 1x mode 5x, 10x modes suspend mode 7 20 0.050 ma ma ma h clprog (note 4) ratio of measured v bus current to cl prog program current 1x mode 5x mode 10x mode suspend mode 211 1170 2377 9.6 ma/ma ma/ma ma/ma ma/ma the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c (note 2). v bus = 5v, bat = 3.8v, r clprog = 3.01k, unless otherwise noted.
ltc4160/ltc4160-1 3 41601fa electrical characteristics symbol parameter conditions min typ max units i vout(powerpath) v out current available before discharging battery 1x mode, bat = 3.3v 5x mode, bat = 3.3v 10x mode, bat = 3.3v suspend mode 0.26 121 667 1217 0.34 0.43 ma ma ma ma v clprog clprog servo voltage in current limit switching modes suspend mode 1.183 100 v mv v uvlo v bus undervoltage lockout rising threshold falling threshold 3.95 4.3 4 4.35 v v v duvlo v bus to bat differential undervoltage lockout rising threshold falling threshold 200 50 mv mv v out v out voltage 1x, 5x, 10x modes, 0v < bat 4.2v, i vout = 0ma, battery charger off usb suspend mode, i vout = 250a 3.5 4.5 bat + 0.3 4.6 4.7 4.7 v v f osc switching frequency 1.8 2.25 2.7 mhz r pmos_powerpath pmos on-resistance 0.18 ? r nmos_powerpath nmos on-resistance 0.3 ? i peak_powerpath peak inductor current clamp 1x mode (note 5) 5x mode (note 5) 10x mode (note 5) 1 1.6 3 a a a r susp suspend ldo output resistance closed loop 10 ? powerpath switching regulator C step-up mode (usb on-the-go) v bus output voltage 0 i vbus 500ma, v out > 3.2v 4.75 5.25 v v out input voltage 2.9 4.2 v i vbus output current limit l 550 680 ma i peak peak inductor current limit (note 5) 1.8 a i otgq v out quiescent current v out = 3.8v, i vbus = 0ma (note 6) 1.6 ma v clprog output current limit servo voltage 1.15 v v outuvlo v out uvlo C v out falling v out uvlo C v out rising 2.5 2.6 2.8 2.9 v v t scfault short circuit fault delay pmos switch off 7.2 ms overvoltage protection v ovcutoff overvoltage protection threshold with 6.2k series resistor 6.1 6.42 6.7 v v ovgate ovgate output voltage v ovsens < v ovcutoff v ovsens > v ovcutoff 1.88 ? v ovsens 0 12 v v t rise ovgate time to reach regulation ovgate c load = 1nf 1.25 ms battery charger v float bat regulated output voltage ltc4160 l 4.179 4.165 4.2 4.2 4.221 4.235 v v ltc4160-1 l 4.079 4.065 4.1 4.1 4.121 4.135 v v i chg constant current mode charger current r prog = 845, 10x mode r clprog 2.49k r prog = 5k, 5x or 10x mode 1120 185 1219 206 1320 223 ma ma i bat battery drain current v bus > v uvlo , suspend mode, i vout = 0a 3.8 6 a v bus = 0v, i vout = 0a (ideal diode mode) 8 12 a the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c (note 2). v bus = 5v, bat = 3.8v, r clprog = 3.01k, unless otherwise noted.
ltc4160/ltc4160-1 4 41601fa electrical characteristics symbol parameter conditions min typ max units v prog prog pin servo voltage 1 v v prog_trkl prog pin servo voltage in trickle charge bat < v trkl 0.1 v v c/10 c/10 threshold voltage at prog 100 mv h prog ratio of i bat to prog pin current 1030 ma/ma i trkl trickle charge current bat < v trkl 100 ma v trkl trickle charge threshold voltage bat rising 2.7 2.85 3 v ?v trkl trickle charge hysteresis voltage 135 mv ?v rechrg recharge battery threshold voltage threshold voltage relative to v float C75 C100 C125 mv t term safety timer termination period timer starts when v bat = v float 3.9 4.3 5.4 hour t badbat bad battery termination time bat < v trkl 0.4 0.5 0.6 hour h c/10 end of charge current ratio (note 7) 0.085 0.1 0.115 ma/ma r on_chg battery charger power fet on-resistance (between v out and bat) 0.18 ? t lim junction temperature in constant temperature mode 110 c ntc v cold cold temperature fault threshold voltage rising threshold hysteresis 75 76.5 1.5 78 %ntcbias %ntcbias v hot hot temperature fault threshold voltage falling threshold hysteresis 33.4 34.9 1.8 36.4 %ntcbias %ntcbias v dis ntc disable threshold voltage falling threshold hysteresis 0.7 1.7 50 2.7 %ntcbias mv i ntc ntc leakage current ntc = ntcbias = 5v C50 50 na ideal diode v fwd forward voltage detection v bus = 0v, i vout = 10ma i vout = 10ma 2 15 mv mv r dropout internal diode on-resistance, dropout i vout = 200ma 0.18 ? i max_diode diode current limit 2 a always on 3.3v ldo supply v ldo3v3 regulated output voltage 0ma < i ldo3v3 < 20ma 3.1 3.3 3.5 v r cl_ldo3v3 closed-loop output resistance 2.7 ? r ol_ldo3v3 dropout output resistance 23 ? logic (i lim0 , i lim1 , id, enotg, encharger) v il logic low input voltage 0.4 v v ih logic high input voltage 1.2 v i pd1 i lim0 , i lim1 , enotg, encharger pull-down current 1.8 a i pu1 id pull-up current 2.5 a status outputs (chrg, vbusgd, fault) v vbusgd output low voltage i vbusgd = 5ma, v bus = 5v 65 100 mv v chrg , v fault output low voltage i chrg = i fault = 5ma, v out = 3.8v 100 150 mv i chrg , i vbusgd , i fault leakage current v chrg = v vbusgd = v fault = 5v 1 a the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c (note 2). v bus = 5v, bat = 3.8v, r clprog = 3.01k, unless otherwise noted.
ltc4160/ltc4160-1 5 41601fa typical performance characteristics usb limited load current vs battery voltage (battery charger disabled) usb limited load current vs battery voltage (battery charger disabled) battery and v bus currents vs load current usb limited battery charge current vs battery voltage usb limited battery charge current vs battery voltage battery and v bus currents vs load current note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc4160e/ltc4160e-1 are guaranteed to meet specifcations from 0c to 85c. specifcations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: the ltc4160e/ltc4160e-1 include overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specifed maximum operating junction temperature may impair device reliability. electrical characteristics t a = 25c, unless otherwise noted. note 4: total input current is the sum of quiescent current, i vbusq , and measured current given by v clprog /r clprog ? (h clprog + 1). note 5: the current limit features of this part are intended to protect the ic from short term or intermittent fault conditions. continuous operation above the maximum specifed pin current rating may result in device degradation or failure. note 6: the bidirectional switchers supply current is bootstrapped to v bus and in the application will refect back to v out by (v bus /v out ) ? 1/effciency. total quiescent current is the sum of the current into the v out pin plus the refected current. note 7: h c/10 is expressed as a fraction of the measured full charge current with indicated prog resistor. battery voltage (v) 2.7 0 load current (ma) 100 300 400 500 3.3 3.9 4.2 900 41601 g01 200 3.0 3.6 600 700 800 v bus = 5v 5x mode load current (ma) 0 current (ma) 250 500 750 800 41601 g03 0 ?250 ?500 200 400 600 1000 v bus current battery current (charging) v bus = 5v bat = 3.8v 5x mode r clprog = 3.01k r prog = 1k battery current (discharging) battery voltage (v) 2.7 0 load current (ma) 20 60 80 100 3.3 3.9 4.2 160 41601 g02 40 3.0 3.6 120 140 v bus = 5v 1x mode battery voltage (v) 2.7 0 charge current (ma) 100 300 400 500 3.3 3.9 4.2 700 41601 g04 200 3.0 3.6 600 v bus = 5v 5x mode r prog = 1k battery voltage (v) 2.7 charge current (ma) 3.3 3.9 4.2 41601 g05 3.0 3.6 v bus = 5v 1x mode r prog = 1k 0 20 60 80 100 140 40 120 load current (ma) 0 current (ma) 250 500 1000 750 41601 g06 0 ?250 ?500 250 500 750 1500 1250 1000 v bus current battery current (charging) v bus = 5v bat = 3.8v 10x mode r clprog = 3.01k r prog = 2k battery current (discharging)
ltc4160/ltc4160-1 6 41601fa typical performance characteristics battery charge current vs v out voltage v out voltage vs battery voltage (charger overprogrammed) v out voltage vs load current (battery charger enabled) powerpath switching regulator transient response powerpath switching regulator effciency vs load current battery charging effciency vs battery voltage with no external load (p b at /p vbus ) ideal diode v-i characteristics ideal diode resistance vs battery voltage v out voltage vs load current (battery charger disabled) t a = 25c, unless otherwise noted. forward voltage (v) 0 current (a) 0.6 0.8 1.0 0.16 41601 g07 0.4 0.2 0 0.04 0.08 0.12 0.20 internal ideal diode with supplemental external vishay si2333 pmos internal ideal diode only v bus = 5v battery voltage (v) 2.7 resistance () 0.15 0.20 0.25 3.9 41601 g08 0.10 0.05 0 3.0 3.3 3.6 4.2 internal ideal diode with supplemental external vishay si2333 pmos internal ideal diode load current (ma) 0 v out (v) 4.00 4.25 4.50 800 41601 g09 3.75 3.00 2.75 3.50 2.50 3.25 200 400 600 1000 bat = 4v bat = 3.4v bat = 2.8v v bus = 5v r clprog = 3.01k r prog = 2k v out (v) 3.40 0 battery current (ma) 100 200 300 400 3.50 3.60 3.70 3.80 41601 g10 500 600 3.45 3.55 3.65 3.75 r clprog = 3.01k r prog = 2k 5x mode battery voltage (v) 2.7 v out (v) 3.9 4.3 4.7 3.9 41601 g11 3.5 3.1 3.7 4.1 4.5 3.3 2.9 2.7 3.0 3.3 3.6 4.2 5x mode 1x mode v bus = 5v i vout = 0a r clprog = 3.01k r prog = 1k battery voltage load current (ma) 0 v out (v) 800 41601 g12 200 400 600 1000 bat = 4v bat = 3.4v bat = 2.8v v bus = 5v r clprog = 3.01k r prog = 2k 4.00 4.25 4.50 3.75 3.00 2.75 3.50 2.50 3.25 v out 50mv/div ac-coupled i vout 500ma/div 0ma 20s/div 41601 g13 v bus = 5v v out = 3.65v charger off 10x mode load current (ma) 30 60 50 40 100 90 80 70 41601 g14 efficiency (%) 10 1000 100 1x mode 5x, 10x mode battery voltage (v) 2.7 50 efficiency (%) 55 65 70 75 3.3 3.9 4.2 95 41601 g15 60 3.0 3.6 80 85 90 r clprog = 3.01k r prog = 1k 1x mode 5x mode
ltc4160/ltc4160-1 7 41601fa typical performance characteristics battery drain current vs battery voltage battery charge current vs temperature normalized battery charger float voltage vs temperature v bus quiescent current vs temperature v bus quiescent current in suspend vs temperature battery drain current vs temperature v bus quiescent current vs v bus voltage (suspend) v out voltage vs load current in suspend v bus current vs load current in suspend t a = 25c, unless otherwise noted. bus voltage (v) 0 0 quiescent current (a) 10 20 30 40 50 60 1 2 3 4 41601 g16 65 bat = 3.8v load current (ma) 0 v out (v) 4.0 4.5 5.0 0.4 41601 g17 3.5 3.0 2.5 0.1 0.2 0.3 0.5 v bus = 5v bat = 3.3v r clprog = 3.01k load current (ma) v bus current (ma) 41601 g18 v bus = 5v bat = 3.3v r clprog = 3.01k 0 0.5 0.4 0.3 0.2 0.1 0.4 0 0.1 0.2 0.3 0.5 battery voltage (v) 2.7 7 8 9 3.9 41601 g19 6 5 3.0 3.3 3.6 4.2 4 3 2 1 0 battery current (a) i vout = 0ma v bus = 0v v bus = 5v (suspend mode) temperature (c) ?40 normalized float voltage 0.998 0.999 1.000 60 41601 g21 0.997 0.996 ?15 10 35 85 1.001 temperature (c) ?40 quiescent current (ma) 15 20 25 60 41601 g22 10 5 0 ?15 10 35 85 v bus = 5v 5x mode 1x mode temperature (c) ?40 0 quiescent current (a) 10 20 30 40 50 70 60 ?15 10 35 60 41601 g23 85 v bus = 5v temperature (c) ?40 8 12 60 41601 g24 6 4 ?15 10 35 85 10 2 0 battery current (a) bat = 3.8v v bus = 0v temperature (c) ?40 0 charge current (ma) 100 200 300 400 0 40 80 120 41601 g20 500 600 ?20 20 60 100 thermal regulation r prog = 2k
ltc4160/ltc4160-1 8 41601fa typical performance characteristics otg boost effciency vs battery voltage otg boost start-up time into current source load vs battery voltage otg boost burst mode current threshold vs battery voltage otg boost transient response otg boost start-up into current source load otg boost burst mode operation otg boost quiescent current vs battery voltage otg boost v bus voltage vs load current otg boost effciency vs load current t a = 25c, unless otherwise noted. battery voltage (v) 0.5 quiescent current (ma) 1.0 1.5 3.0 2.5 41601 g25 2.0 2.7 3.3 3.9 4.2 3.0 3.6 v out = bat load current (ma) 0 100 2.5 3.0 v bus (v) 4.0 5.5 200 400 500 41601 g26 3.5 5.0 4.5 300 600 700 v out = bat = 4.2v v out = bat = 3.8v v out = bat = 3.4v v out = bat = 3v v bus = 4.75v i vbus = 500ma load current (ma) 1 30 40 efficiency (%) 80 90 100 10 100 1000 41601 g27 70 60 50 v out = bat = 4.2v v out = bat = 3.8v v out = bat = 3.4v v out = bat = 3v battery voltage (v) 2.7 3.3 3.9 4.2 3.0 3.6 efficiency (%) 80 85 41601 g28 75 70 100 95 90 500ma load 100ma load v out = bat battery voltage (v) 2.7 3.3 3.9 4.2 3.0 3.6 1.6 time (ms) 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 41601 g29 22f on v bus , 22f and load through ovp 22f on v bus , load through ovp 22f on v bus , no ovp v out = bat i load = 500ma 2.7 3.3 3.9 4.2 3.0 3.6 battery voltage (v) load current (ma) 20 41601 g30 30 0 100 90 40 80 10 70 60 50 v out = bat v bus 50mv/div ac coupled i vbus 200ma/div 0ma 20s/div 41601 g31 v out = 3.8v i vbus 200ma/div v bus 2v/div 0v 0ma 200s/div 41601 g32 v out = 3.8v i load = 500ma v bus 50mv/div ac coupled v sw 1v/div 0v 50s/div v out = 3.8v i load = 10ma 41601 g33
ltc4160/ltc4160-1 9 41601fa typical performance characteristics ovp connect waveform ovp disconnect waveform rising ovp threshold vs temperature ovgate vs ovsens ovsens quiescent current vs temperature vbusgd, chrg, fault pin current vs voltage (pull-down state) 3.3v ldo output voltage vs load current, v bus = 0v 3.3v ldo step response (5ma to 15ma) oscillator frequency vs temperature t a = 25c, unless otherwise noted. load current (ma) 0 output voltage (v) 3.0 3.2 20 41601 g34 2.8 2.6 5 10 15 25 3.4 bat = 3.9v, 4.2v bat = 3.6v bat = 3v bat = 3.5v bat = 3.4v bat = 3.1v bat = 3.2v bat = 3.3v i ldo3v3 5ma/div 0ma 20s/div bat = 3.8v 41601 g35 v ldo3v3 20mv/div ac coupled temperature (c) ?40 frequency (mhz) 2.20 2.25 2.30 60 41601 g36 2.15 2.10 2.05 ?15 10 35 85 v out = 5v v out = 4.2v v out = 3.6v v out = 3v v out = 2.7v temperature (c) ?40 ovp threshold (v) 6.45 6.46 6.47 60 41601 g39 6.44 6.43 6.42 ?15 10 35 85 input voltage (v) 0 0 ovgate (v) 2 4 6 8 10 12 2 4 6 8 41601 g40 ovsens connected to input through 6.2k resistor temperature (c) ?40 quiescent current (a) 39 42 48 45 60 41601 g41 36 33 30 ?15 10 35 85 v ovsens = 5v vbusgd, chrg, fault pin voltage (v) 0 vbusgd, chrg, fault pin current (ma) 60 80 120 100 4 41601 g42 40 20 0 1 2 3 5 v bus = 5v bat = 3.8v vbusgd fault , chrg v bus 5v/div ovgate 5v/div 500s/div 41601 g38 ovp input voltage 5v to 10v step 5v/div ovgate 250s/div 41601 g37 0v 2v/div v bus
ltc4160/ltc4160-1 10 41601fa pin functions ovgate (pin 1): overvoltage protection gate output. connect ovgate to the gate pin of an external n-channel mosfet. the source of the transistor should be connected to v bus and the drain should be connected to the products dc input connector. in the absence of an overvoltage con - dition, this pin is connected to an internal charge pump capable of creating suffcient overdrive to fully enhance the mosfet. if an overvoltage condition is detected, ov - gate is brought rapidly to gnd to prevent damage to the ltc4160/ltc4160-1. ovgate works in conjunction with ovsens to provide this protection. ovsens (pin 2): overvoltage protection sense input. ovsens should be connected through a 6.2k resistor to the input power connector and the drain of an external n-channel mosfet. when the voltage on this pin exceeds v ovcutoff, the ovgate pin will be pulled to gnd to dis - able the mosfet and protect the ltc4160/ltc4160-1. the ovsens pin shunts current during an overvoltage transient in order to keep the pin voltage at 6v. vbusgd (pin 3): logic output. this is an open-drain output which indicates that v bus is above v uvlo and v duvlo . vbusgd requires a pull-up resistor and/or led to provide indication. fault (pin 4): logic output. this in an open-drain output which indicates a bad battery fault when the charger is enabled or a short circuit condition on v bus when the bidirectional powerpath switching regulator is in step-up mode (on-the-go). fault requires a pull-up resistor and/or led to provide indication. id (pin 5): logic input. this pin independently enables the bidirectional switching regulator to step-up the volt - age on v out and provide a 5v output on the v bus pin for usb on-the-go applications. if the host does not power down v bus then connect this pin directly to the id pin of a usb micro-ab receptacle. active low. has an internal 2.5a pull-up current source. enotg (pin 6): logic input. this pin independently enables the bidirectional switching regulator to step-up the voltage on v out and provide a 5v output on the v bus pin for usb on-the-go applications. active high. has an internal 1.8a pull-down current source. encharger (pin 7): logic input. this pin enables the battery charger. active low. has an internal 1.8a pull- down current source. prog (pin 8): charge current program and charge cur - rent monitor pin. connecting a 1% resistor from prog to ground, programs the charge current. if suffcient input power is available in constant-current mode, this pin servos to 1v. the voltage on this pin always represents the actual charge current by using the following formula: i v r bat p rog pr og = ? 1030 chrg (pin 9): logic output. this is an open-drain out - put that indicates whether the battery is charging or not charging. chrg requires a pull-up resistor and/or led to provide indication. idgate (pin 10): ideal diode amplifer output. this pin controls the gate of an optional external p-channel mosfet used as an ideal diode between v out and bat. the external ideal diode operates in parallel with the internal ideal diode. the source of the p-channel mosfet should be connected to v out and the drain should be connected to bat. if the external ideal diode mosfet is not used, idgate should be left foating. bat (pin 11): single cell li-ion battery pin. depending on available v bus power, a li-ion battery on bat will either deliver power to v out through the ideal diode or be charged from v out via the battery charger. v out (pin 12): output voltage of the bidirectional power - path switching regulator in step-down mode and input voltage of the battery charger. the majority of the portable product should be powered from v out . the ltc4160/ ltc4160-1 will partition the available power between the external load on v out and the internal battery charger. priority is given to the external load and any extra power is used to charge the battery. an ideal diode from bat to v out ensures that v out is powered even if the load exceeds the allotted power from v bus or if the v bus power source is removed. in on-the-go mode, this pin delivers power to v bus via the sw pin. v out should be bypassed with a low impedance multilayer ceramic capacitor.
ltc4160/ltc4160-1 11 41601fa pin functions v bus (pin 13): power pin. this pin delivers power to v out via the sw pin by drawing controlled current from a dc source such as a usb port or dc output wall adapter. in on-the-go mode this pin provides power to external loads. bypass v bus with a low impedance multilayer ceramic capacitor. sw (pin 14): the sw pin transfers power between v bus to v out via the bidirectional switching regulator. see the applications information section for a discussion of inductance value and current rating. i lim0 , i lim1 (pins 15, 16): i lim0 and i lim1 control the v bus input current limit of the bidirectional powerpath switching regulator in step-down mode. see table 1. each has an internal 1.8a pull-down current source. clprog (pin 17): usb current limit program and monitor pin. a 1% resistor from clprog to ground determines the upper limit of the current drawn or sourced from the v bus pin. a precise fraction, h clprog , of the v bus current is sent to the clprog pin when the pmos switch of the bidirectional powerpath switching regulator is on. the switching regulator delivers power until the clprog pin reaches 1.18v in step-down mode and 1.15v in step-up mode. when the switching regulator is in step-down mode, clprog is used to regulate the average input current. several v bus current limit settings are available via user input which will typically correspond to the 500ma and 100ma usb specifcations. when the switching regulator is in step-up mode (usb on-the-go), clprog is used to limit the average output current to 680ma. a multilayer ceramic averaging capacitor or r-c network is required at clprog for fltering. ldo3v3 (pin 18): 3.3v ldo output pin. this pin provides a regulated always-on 3.3v supply voltage. ldo3v3 gets its power from v out . it may be used for light loads such as a watch dog microprocessor or real time clock. a 1f capacitor is required from ldo3v3 to ground. if the ldo3v3 output is not used it should be disabled by connecting it to v out . ntcbias (pin 19): ntc thermistor bias output. if ntc operation is desired, connect a bias resistor between ntcbias and ntc, and an ntc thermistor between ntc and gnd. to disable ntc operation, connect ntc to gnd and leave ntcbias open. ntc (pin 20): input to the thermistor monitoring circuits. the ntc pin connects to a negative temperature coeffcient thermistor, which is typically co-packaged with the battery, to determine if the battery is too hot or too cold to charge. if the batterys temperature is out of range, charging is paused until it re-enters the valid range. a low drift bias resistor is required from ntcbias to ntc and a thermistor is required from ntc to ground. to disable ntc operation, connect ntc to gnd and leave ntcbias open. gnd (exposed pad pin 21): ground. the exposed pad should be connected to a continuous ground plane on the second layer of the printed circuit board by several vias directly under the ltc4160/ltc4160-1.
ltc4160/ltc4160-1 12 41601fa block diagram + ? + + ? 0.3v v clprog 3.6v clprog i switch /n + ? + ? 15mv omv ideal diode pwm and gate drive average v bus current limit controller v bus voltage controller v out voltage controller + ? 5.1v idgate 10 v out 12 sw to system load single cell li-ion 41601 bd 14 bat 11 to usb or wall adapter optional external overvoltage protection n-channel mosfet optional external overvoltage protection resistor + v bus + ? 6v overvoltage protection 2 + ? + ? 1v battery charger i bat /1000 + ? v float + ? prog 8 17 13 2 ovsens 1 ovgate + ? 3.3v ldo3v3 3v3 ldo 18 + ? + ? 4.6v 100mv suspend ldo i ldo /m 20 + ? + ? + ? 0.1v undertemp overtemp ntc ntcbias v out ntc t ntc fault low bat enotg ntc enable 6 id 5 control logic gnd 21 19 encharger 7 16 i lim0 15 i lim1 4hrs 100mv + ? 2.9v + ? rechrg v rechrg fault + ? 9 chrg otg short circuit bad cell 4 fault vbusgd 4.3v 0.2v bat 3 vbusgd ? + + ? + ? optional external ideal diode p-channel mosfet
ltc4160/ltc4160-1 13 41601fa operation introduction the ltc4160/ltc4160-1 are high effciency bidirectional switching power managers and li-ion/polymer battery chargers designed to make optimal use of the power available while minimizing power dissipation and easing thermal budgeting constraints. the innovative powerpath architecture ensures that the end product application is powered immediately after external voltage is applied, even with a completely dead battery, by prioritizing power to the end product. when acting as a step-down converter, the ltc4160/ ltc4160-1s bidirectional switching regulator takes power from usb, wall adapters, or other 5v sources and provides power to the end product application and effciently charges the battery using bat-track. because power is conserved, the ltc4160/ltc4160-1 allow the load current on v out to exceed the current drawn by the usb port, making maxi - mum use of the allowable usb power for battery charging. for usb compatibility, the switching regulator includes a precision average input current limit. the bidirectional switching regulator and battery charger communicate to ensure that the average input current never exceeds the usb specifcations. in addition, the bidirectional switching regulator can also operate as a 5v synchronous step-up converter, taking power from v out and delivering up to 500ma to v bus without the need for any additional external components. this enables systems with usb dual-role transceivers to function as usb on-the-go dual-role devices. true output disconnect and average output current limit features are included for short circuit protection. the ltc4160/ltc4160-1 contain both an internal 180m ideal diode as well as an ideal diode controller for use with an external p-channel mosfet. the ideal diodes from bat to v out guarantee that ample power is always available to v out even if there is insuffcient or absent power at v bus . an always-on ldo provides a regulated 3.3v from avail - able power at v out . drawing very little quiescent current, this ldo will be on at all times and can be used to supply up to 20ma. the ltc4160/ltc4160-1 also feature an overvoltage pro - tection circuit which is designed to work with an external n-channel mosfet to prevent damage to their inputs caused by accidental application of high voltage. finally, to prevent battery drain when a device is con - nected to a suspended usb port, an ldo from v bus to v out provides low power usb suspend current to the end product application. bidirectional powerpath switching regulator C step-down mode the power delivered from v bus to v out is controlled by a 2.25mhz constant frequency bidirectional switching regulator in step-down mode. v out drives the combination of the external load and the battery charger. to meet the maximum usb load specifcation, the switching regulator contains a measurement and control system that ensures that the average input current remains below the level programmed at clprog. if the combined load does not cause the switching regu - lator to reach the programmed input current limit, v out will track approximately 0.3v above the battery voltage. by keeping the voltage across the battery charger at this low level, power lost to the battery charger is minimized. figure 1 shows the power fow in step-down mode. if the combined external load plus battery charge current is large enough to cause the switching regulator to reach the programmed input current limit, the battery charger will reduce its charge current by precisely the amount necessary to enable the external load to be satisfed. even if the battery charge current is programmed to exceed the allowable usb current, the usb specifcation for average input current will not be violated; the battery charger will reduce its current as needed. furthermore, if the load cur - rent at v out exceeds the programmed power from v bus , load current will be drawn from the battery via the ideal diode(s) even when the battery charger is enabled. the current out of clprog is a precise fraction of the v bus current. when a programming resistor and an averaging capacitor are connected from clprog to gnd, the volt - age on clprog represents the average input current of the switching regulator. as the input current approaches
ltc4160/ltc4160-1 14 41601f operation the programmed limit, clprog reaches 1.18v and power delivered by the switching regulator is held constant. the input current limit is programmed by the i lim0 and i lim1 pins. the input current limit has four possible set - tings ranging from the usb suspend limit of 500a up to 1a for wall adapter applications. two of these settings are specifcally intended for use in the 100ma and 500ma usb application. refer to table 1 for current limit settings using i lim0 and i lim1 . table 1. usb current limit settings using i lim0 and i lim1 i lim1 i lim0 usb setting 0 0 1x mode (usb 100ma limit) 0 1 10x mode (wall 1a limit) 1 0 low power suspend (usb 500a limit) 1 1 5x mode (usb 500ma limit) when the switching regulator is activated, the average input current will be limited by the clprog programming resistor according to the following expression: ii v r h vbu s vbusq cl p rog cl p rog cl p rog =+ + () ?1 where i vbusq is the quiescent current of the ltc4160/ ltc4160-1, v clprog is the clprog servo voltage in current limit, r clprog is the value of the programming resistor and h clprog is the ratio of the measured cur - rent at v bus to the sample current delivered to clprog. refer to the electrical characteristics table for values of h clprog , v clprog and i vbusq . given worst-case circuit tolerances, the usb specifcation for the average input current in 100ma or 500ma mode will not be violated, provided that r clprog is 3.01k or greater. while not in current limit, the switching regulators bat-track feature will set v out to approximately 300mv above the voltage at bat. however, if the voltage at bat is below 3.3v, and the load requirement does not cause the switching regulator to exceed its current limit, v out will regulate at a fxed 3.6v, as shown in figure 2. this instant-on operation will allow a portable product to run immediately when power is applied without waiting for the battery to charge. if the load does exceed the current limit at v bus , v out will range between the no-load voltage and slightly below the battery voltage, indicated by the shaded region of figure 2. figure 1. power path block diagram C power available from usb/wall adapter + ? + + ? 0.3v 1.18v 3.6v clprog i switch /n + ? + ? 15mv omv ideal diode pwm and gate drive average v bus input current limit controller v bus voltage controller v out voltage controller + ? 5v idgate 10 v out 12 sw 3.5v to (bat + 0.3v) to system load single cell li-ion 41601 f01 14 bat usb input battery power 11 to usb or wall adapter + v bus + ? 6v overvoltage protection 2 + ? + ? 1v battery charger i bat /1000 + ? v float + ? prog 8 17 13 2 ovsens 1 ovgate
ltc4160/ltc4160-1 15 41601f for very low-battery voltages, the battery charger acts like a load and, due to limited input power, its current will tend to pull v out below the 3.6v instant-on voltage. to prevent v out from falling below this level, an undervoltage circuit automatically detects that v out is falling and reduces the battery charge current as needed. this reduction ensures that load current and voltage are always prioritized while allowing as much battery charge current as possible. see over programming the battery charger in the applications information section. the voltage regulation loop compensation is controlled by the capacitance on v out . a multilayer ceramic capacitor of 10f is required for loop stability. additional capacitance beyond this value will improve transient response. an internal undervoltage lockout circuit monitors v bus and keeps the switching regulator off until v bus rises above 4.30v and is about 200mv above the battery voltage. when both conditions are met, vbusgd goes low and the switching regulator turns on. hysteresis on the uvlo forces vbusgd high and turns off the switching regulator if v bus falls below 4.00v or to within 50mv of the battery voltage. when this happens, system power at v out will be drawn from the battery via the ideal diode(s). comes from the battery via the ideal diode(s). as a step-up converter, the bidirectional switching regulator produces 5v on v bus and is capable of delivering at least 500ma. usb on-the-go can be enabled by either of the external control pins, enotg or id. figure 3 shows the power fow in step-up mode. an undervoltage lockout circuit monitors v out and prevents step-up conversion until v out rises above 2.8v. to prevent backdriving of v bus when input power is available, the v bus undervoltage lockout circuit prevents step-up conversion if v bus is already greater than 4.3v at the time step-up mode is enabled. the switching regulator is also designed to allow true output disconnect by eliminating body diode conduction of the internal pmos switch. this allows v bus to go to zero volts during a short-circuit condition or while shutdown, drawing zero current from v out . the voltage regulation loop is compensated by the capaci - tance on v bus . a 4.7f multilayer ceramic capacitor is required for loop stability. additional capacitance beyond this value will improve transient response. the v bus volt - age has approximately 3% load regulation up to an output current of 500ma. at light loads, the switching regulator goes into burst mode ? operation. the regulator will deliver power to v bus until it reaches 5.1v after which the nmos and pmos switches shut off. the regulator delivers power again to v bus once it falls below 5.1v. the switching regulator features both peak inductor and average output current limit. the peak current-mode architecture limits peak inductor current on a cycle-by- cycle basis. the peak current limit is equal to v bus /2 to a maximum of 1.8a so that in the event of a sudden short circuit, the current limit will fold back to a lower value. in step-up mode, the voltage on clprog represents the average output current of the switching regulator when a programming resistor and an averaging capacitor are connected from clprog to gnd. with a 3.01k resistor on clprog, the bidirectional switching regulator has an output current limit of 680ma. as the output current ap - proaches this limit, clprog servos to 1.15v and v bus falls rapidly to v out . when v bus is close to v out there may not be suffcient negative slope on the inductor current when the pmos switch is on to balance the rise in the inductor operation figure 2. v out vs bat bidirectional powerpath switching regulator C step-up mode for usb on-the-go applications, the bidirectional powerpath switching regulator acts as a step-up converter to deliver power from v out to v bus . the power from v out bat (v) 2.4 4.5 4.2 3.9 3.6 3.3 3.0 2.7 2.4 3.3 3.9 41601 f02 2.7 3.0 3.6 4.2 v out (v) no load 300mv
ltc4160/ltc4160-1 16 41601fa + ? + + ? 0.3v 1.18v 3.6v clprog i switch /n + ? + ? 15mv omv ideal diode pwm and gate drive average v bus output current limit controller v bus voltage controller v out voltage controller + ? 5.1v 17 idgate 10 v out 12 sw 3.5v to (bat + 0.3v) to system load single cell li-ion 41601 f03 14 bat battery power 11 to usb or wall adapter 13 + 2 ovsens v bus 1 ovgate + ? 6v overvoltage protection 2 + ? + ? 1v battery charger i bat /1000 + ? v float + ? prog 8 operation current when the nmos switch is on. this will cause the inductor current to run away and the voltage on clprog to rise. when clprog reaches 1.2v the switching of the synchronous pmos is terminated and v out is applied statically to its gate. this ensures that the inductor current will have suffcient negative slope during the time current is fowing out of the v bus pin. the pmos will resume switching when clprog drops down to 1.15v. the pmos switch is enabled when v bus rises above v out + 180mv and is disabled when it falls below v out + 70mv to prevent the inductor current from run - ning away when not in current limit. if the pmos switch is disabled for more than 7.2ms then the switcher will shut off, the fault pin will go low and a short circuit fault will be declared. to re-enable step-up mode, the enotg pin, with id high, must be cycled low and then high or the id pin, with enotg grounded, must be cycled high and then low. ideal diode(s) from bat to v out the ltc4160/ltc4160-1 each have an internal ideal diode as well as a controller for an external ideal diode. both the internal and the external ideal diodes are always on and will respond quickly whenever v out drops below bat. if the load current increases beyond the power allowed from the bidirectional switching regulator, additional power will be pulled from the battery via the ideal diode(s). furthermore, if power to v bus (usb or wall adapter) is removed, then all of the application power will be provided by the battery via the ideal diode(s). the ideal diode(s) will prevent v out from drooping with only the storage capaci- tance required for the bidirectional switching regulator. the internal ideal diode consists of a precision amplifer that activates a large on-chip p-channel mosfet whenever figure 4. ideal diode v-i characteristics figure 3. powerpath block diagram C usb on-the-go forward voltage (mv) (bat ? v out ) 0 current (ma) 600 1800 2000 2200 120 240 300 41601 f04 200 1400 1000 400 1600 0 1200 800 60 180 360 480420 vishay si2333 optional external ideal diode ltc4160/ ltc4160-1 ideal diode on semiconductor mbrm120lt3
ltc4160/ltc4160-1 17 41601fa operation the voltage at v out is approximately 15mv (v fwd ) below the voltage at bat. within the amplifers linear range, the small-signal resistance of the ideal diode will be quite low, keeping the forward drop near 15mv. at higher current levels, the mosfet will be in full conduction. to supplement the internal ideal diode, an external p- channel mosfet may be added from bat to v out . the idgate pin of the ltc4160/ltc4160-1 drives the gate of the external p-channel mosfet for automatic ideal diode control. the source of the external p-channel mosfet should be connected to v out and the drain should be con - nected to bat. capable of driving a 1nf load, the idgate pin can control an external p-channel mosfet having an on-resistance of 30m? or lower. suspend ldo if the ltc4160/ltc4160-1 is confgured for usb suspend mode, the bidirectional switching regulator is disabled and the suspend ldo provides power to the v out pin (pre- suming there is power available at v bus ). this ldo will prevent the battery from running down when the portable product has access to a suspended usb port. regulating at 4.6v, this ldo only becomes active when the bidirectional switching regulator is disabled (suspended). the sus - pend ldo sends a scaled copy of the v bus current to the clprog pin, which will servo to approximately 100mv in this mode. in accordance with the usb specifcation, the input to the ldo is current limited so that it will not exceed the low power suspend specifcation. if the load on v out exceeds the suspend current limit, the additional current will come from the battery via the ideal diode(s). 3.3v always-on ldo supply the ltc4160/ltc4160-1 include a low quiescent current low dropout regulator that is always powered. this ldo can be used to provide power to a system pushbutton controller, standby microcontroller or real time clock. designed to deliver up to 20ma, the always-on ldo re - quires at least a 1f multilayer ceramic bypass capacitor for compensation. the ldo is powered from v out , and therefore will enter dropout at loads less than 20ma as v out falls near 3.3v. if the ldo3v3 output is not used, it should be disabled by connecting it to v out . battery charger the ltc4160/ltc4160-1 include a constant-current/con - stant-voltage battery charger with automatic recharge, automatic termination by safety timer, low voltage trickle charging, bad cell detection, and thermistor sensor input for out-of-temperature charge pausing. the charger can be disabled using the encharger pin. battery preconditioning when a battery charge cycle begins, the battery charger frst determines if the battery is deeply discharged. if the battery voltage is below v trkl , typically 2.85v, an automatic trickle charge feature sets the battery charge current to 10% of the programmed value. if the low voltage persists for more than a 1/2 hour, the battery charger automatically terminates and indicates via the chrg and fault pins that the battery was unresponsive. once the battery voltage is above 2.85v, the charger begins charging in full power constant-current mode. the cur - rent delivered to the battery will try to reach 1030/r prog . depending on available input power and external load conditions, the battery charger may or may not be able to charge at the full programmed rate. the external load will always be prioritized over the battery charge current. likewise, the usb current limit programming will always be observed and only additional power will be available to charge the battery. when system loads are light, battery charge current will be maximized. charge termination the battery charger has a built-in safety timer. when the voltage on the battery reaches the pre-programmed foat voltage, the battery charger will regulate the battery volt - age and the charge current will decrease naturally. once the battery charger detects that the battery has reached the foat voltage, the four hour safety timer is started. after the safety timer expires, charging of the battery will discontinue and no more current will be delivered. automatic recharge after the battery charger terminates, it will remain off drawing only microamperes of current from the battery. if the portable product remains in this state long enough,
ltc4160/ltc4160-1 18 41601fa the battery will eventually self discharge. to ensure that the battery is always topped off, a charge cycle will auto - matically begin when the battery voltage falls below the recharge threshold which is typically 100mv less than the chargers foat voltage. in the event that the safety timer is running when the battery voltage falls below the recharge threshold, it will reset back to zero. to prevent brief excursions below the recharge threshold from reset - ting the safety timer, the battery voltage must be below the recharge threshold for more than 1ms. the charge cycle and safety timer will also restart if the v bus uvlo cycles low and then high (e.g., v bus is removed and then replaced), or if the battery charger is cycled on and off by the encharger pin. charge current the charge current is programmed using a single resis - tor from prog to ground. 1/1030th of the battery charge current is sent to prog, which will attempt to servo to 1.000v. thus, the battery charge current will try to reach 1030 times the current in the prog pin. the program resistor and the charge current are calculated using the following equation: i v r ch g p rog p rog = ? 1030 in either the constant-current or constant-voltage charging modes, the voltage at the prog pin will be proportional to the actual charge current delivered to the battery. there - fore, the actual charge current can be determined at any time by monitoring the prog pin voltage and using the following equation: i v r bat p rog pr og = ? 1030 in many cases, the actual battery charge current, i bat , will be lower than i chg due to limited input power available and prioritization with the system load drawn from v out . the battery charger flow chart on the next page illustrates the battery chargers algorithm. charge status indication the chrg and fault pins can be used to indicate the status of the battery charger. two possible states are represented by chrg : charging and not charging. an open-drain output, the chrg pin can drive an indicator led through a current limiting resistor for human interfacing or simply a pull-up resistor for microprocessor interfacing. when charging begins, chrg is pulled low and remains low for the duration of a normal charge cycle. when charg - ing is complete, i.e., the bat pin reaches the foat and the charge current has dropped to one tenth of the programmed value, the chrg pin goes high. the chrg pin does not respond to the c/10 threshold if the ltc4160/ltc4160-1 is in v bus input current limit. this prevents false end-of- charge indications due to insuffcient power available to the battery charger. table 2 illustrates the possible states of the chrg and fault pins when the battery charger is active. table 2. charge status readings using the chrg and fault pins status chrg fault charging/ntc fault low high not charging high high bad battery high low an ntc fault pauses charging while the battery tempera - ture is out of range but is not indicated using the chrg or fault pins. if a battery is found to be unresponsive to charging (i.e., its voltage remains below 2.85v for 1/2 hour) the chrg pin goes high and the fault pin goes low to indicate a bad battery fault. note that the ltc4160/ltc4160-1 are 3-terminal powerpath products where system load is always priori - tized over battery charging. due to excessive system load, there may not be suffcient power to charge the battery beyond the trickle charge threshold voltage within the bad battery timeout period. in this case, the battery charger will falsely indicate a bad battery. system software may then reduce the load and reset the battery charger to try again. the fault pin is also used to indicate whether there is a short circuit condition on v bus when the bidirectional operation
ltc4160/ltc4160-1 19 41601fa operation battery charger flow chart clear event timer ntc out of range battery state charge at 1030v/r prog rate pause event timer pause event timer charge with fixed voltage (v float ) run event timer charge at 100v/r prog (c/10 rate) run event timer assert chrg low power on/ enable charger timer > 30 minutes timer > 4 hours bat > 2.85v bat < v rechrg i bat < c/10 no no yes yes yes yes yes yes no no bat > v float ? bat < 2.85v 2.85v < bat < v float ? no no no inhibit charging stop charging indicate battery fault at fault bat rising through v rechrg bat falling through v rechrg chrg hi-z chrg hi-z 41601 flow no yes yes inhibit charging
ltc4160/ltc4160-1 20 41601fa operation switching regulator is in on-the-go mode. when a short circuit condition is detected, fault will go low-z. the enotg or vbusgd pins can be used to determine which fault has occurred. if enotg or vbusgd is low when fault went low, then a bad battery fault has occurred. if either pin is high, then a short circuit on v bus has occurred. ntc thermistor the battery temperature is measured by placing a nega - tive temperature coeffcient (ntc) thermistor close to the battery pack. to use this feature connect the ntc thermistor, r ntc , be- tween the ntc pin and ground and a bias resistor, r nom , from ntcbias to ntc. r nom should be a 1% 200ppm resistor with a value equal to the value of the chosen ntc thermistor at 25c (r25). the ltc4160/ltc4160-1 will pause charging when the resistance of the ntc thermistor drops to 0.54 times the value of r25 or approximately 54k for a 100k thermis - tor. for a vishay curve 1 thermistor, this corresponds to approximately 40c. if the battery charger is in constant- voltage (foat) mode, the safety timer also pauses until the thermistor indicates a return to a valid temperature. as the temperature drops, the resistance of the ntc thermistor rises. the ltc4160/ltc4160-1 are also designed to pause charging when the value of the ntc thermistor increases to 3.25 times the value of r25. for a vishay curve 1 100k thermistor, this resistance, 325k, corresponds to approximately 0c. the hot and cold comparators each have approximately 3c of hysteresis to prevent oscilla - tion about the trip point. grounding the ntc pin disables all ntc functionality. thermal regulation to prevent thermal damage to the ltc4160/ltc4160-1 or surrounding components, an internal thermal feedback loop will automatically decrease the programmed charge current if the die temperature rises to 105c. this thermal regulation technique protects the ltc4160/ltc4160-1 from excessive temperature due to high power operation or high ambient thermal conditions, and allows the user to push the limits of the power handling capability with a given circuit board design. the beneft of the ltc4160/ ltc4160-1 thermal regulation loop is that charge current can be set according to actual conditions rather than worst-case conditions for a given application with the assurance that the charger will automatically reduce the current in worst-case conditions. overvoltage protection the ltc4160/ltc4160-1 can protect themselves from the inadvertent application of excessive voltage to v bus with just two external components: an n-channel mosfet and a 6.2k resistor. the maximum safe overvoltage magnitude will be determined by the choice of the external mosfet and its associated drain breakdown voltage. the overvoltage protection circuit consists of two pins. the frst, ovsens, is used to measure the externally ap- plied voltage through an external resistor. the second, ovgate, is an output used to drive the gate pin of the external mosfet. when ovsens is below 6v, an inter - nal charge pump will drive ovgate to approximately 1.88 ? ovsens. this will enhance the n-channel mosfet and provide a low impedance connection to v bus which will, in turn, power the ltc4160/ltc4160-1. if ovsens should rise above 6v due to a fault or the use of an in - correct wall adapter, ovgate will be pulled to gnd. this disables the external mosfet and protects downstream circuitry. when the voltage drops below 6v again, the external mosfet will be re-enabled. the charge pump output on ovgate has limited output drive capability. care must be taken to avoid leakage on this pin as it may adversely affect operation. see the applications information section for resistor power dissipation rating calculations, a table of recommended components, and reverse-voltage protection. shutdown mode the usb switching regulator is enabled whenever v bus is above v uvlo and the ltc4160/ltc4160-1 are not in usb suspend mode. the ideal diode(s) are enabled at all times and cannot be disabled.
ltc4160/ltc4160-1 21 41601fa applications information bidirectional powerpath switching regulator clprog resistor and capacitor selection as described in the bidirectional powerpath switching regulator C step-down mode section, the resistor on the clprog pin determines the average v bus input current limit. in step-down mode the switching regulators v bus input current limit can be set to either the 1x mode (usb 100ma), the 5x mode (usb 500ma) or the 10x mode. the v bus input current will be comprised of two components, the current that is used to drive v out and the quiescent current of the switching regulator. to ensure that the total average input current remains below the usb specifcation, both components of input current should be considered. the electrical characteristics table gives the typical values for quiescent currents in all settings as well as current limit programming accuracy. to get as close to the 500ma or 100ma specifcations as possible, a precision resistor should be used. recall that: i vbus = i vbusq + v clprog /r clpprog ? (h clprog +1). an averaging capacitor is required in parallel with the resistor so that the switching regulator can determine the average input current. this capacitor also provides the dominant pole for the feedback loop when current limit is reached. to ensure stability, the capacitor on clprog should be 0.1f or larger. bidirectional powerpath switching regulator inductor selection because the v bus voltage range and v out voltage range of the powerpath switching regulator are both fairly nar - row, the ltc4160/ltc4160-1 were designed for a specifc inductance value of 3.3h. some inductors which may be suitable for this application are listed in table 3. table 3. recommended powerpath inductors for the ltc4160/ltc4160-1 inductor type l (h) max idc (a) max dcr () size in mm (l x w x h) manufacturer lps4018 3.3 2.2 0.08 3.9 x 3.9 x 1.7 coilcraft www.coilcraft.com d53lc db318c 3.3 3.3 2.26 1.55 0.034 0.070 5 x 5 x 3 3.8 x 3.8 x 1.8 toko www.toko.com we-tpc type m1 3.3 1.95 0.065 4.8 x 4.8 x 1.8 wurth electronik www.we-online.com cdrh6d12 cdrh6d38 3.3 3.3 2.2 3.5 0.063 0.020 6.7 x 6.7 x 1.5 7 x 7 x 4 sumida www.sumida.com bidirectional powerpath switching regulator v bus and v out bypass capacitor selection the type and value of capacitors used with the ltc4160/ ltc4160-1 determine several important parameters such as regulator control-loop stability and input voltage ripple. because the ltc4160/ltc4160-1 use a bidirectional switching regulator between v bus and v out , the v bus current waveform contains high frequency components. it is strongly recommended that a low equivalent series resistance (esr) multilayer ceramic capacitor (mlcc) be used to bypass v bus . tantalum and aluminum capacitors are not recommended because of their high esr. the value of the capacitor on v bus directly controls the amount of input ripple for a given load current. increasing the size of this capacitor will reduce the input ripple. the inrush current limit specifcation for usb devices is calculated in terms of the total number of coulombs needed to charge the v bus bypass capacitor to 5v. the maximum inrush charge for usb on-the-go devices is 33c. this places a limit of 6.5f of capacitance on v bus assuming a linear capacitor. however, most ceramic capacitors have a capacitance that varies with bias voltage. the average capacitance needs to be less than 6.5f over a 0v to 5v bias voltage range to meet the inrush current-limit specifcation. a 10f capacitor in a 0805 package, such as the murata grm21br71a106ke51l would be a suitable v bus bypass capacitor. if more capacitance is required for better noise performance and stability, it should be connected directly to the v bus pin when using the overvoltage protection circuit. this extra capacitance will be soft-connected over a couple of milliseconds to limit inrush current and avoid excessive transient voltage drops on v bus . to prevent large v out voltage steps during transient load conditions, it is also recommended that an mlcc be used to bypass v out . the output capacitor is used in the com - pensation of the switching regulator. at least 10f with low esr are required on v out . additional capacitance will improve load transient performance and stability. mlccs typically have exceptional esr performance. mlccs combined with a tight board layout and an unbroken ground plane will yield very good performance and low emi emissions.
ltc4160/ltc4160-1 22 41601fa applications information there are mlccs available with several types of dielectrics each having considerably different characteristics. for example, x7r mlccs have the best voltage and tempera- ture stability. x5r mlccs have apparently higher packing density but poorer performance over their rated voltage and temperature ranges. y5v mlccs have the highest packing density, but must be used with caution, because of their extreme nonlinear characteristic of capacitance versus voltage. the actual in-circuit capacitance of a ceramic capacitor should be measured with a small ac signal and dc bias as is expected in-circuit. many vendors specify the capacitance versus voltage with a 1v rms ac test signal and, as a result, over state the capacitance that the capacitor will present in the application. using similar operating conditions as the application, the user must measure or request from the vendor the actual capacitance to determine if the selected capacitor meets the minimum capacitance that the application requires. overvoltage protection v bus can be protected from overvoltage damage with two additional components, a resistor r1 and an n-channel mosfet mn1, as shown in figure 5. suitable choices for mn1 are listed in table 4. table 4. recommended n-channel mosfets for the overvoltage protection circuit part # bvdss r on package si1472dh 30v 57m sc70-6 si2302ads 20v 60m sot-23 si2306bds 30v 47m sot-23 si2316ds 30v 50m sot-23 irlml2502 20v 50m sot-23 fdn372s 30v 50m sot-23 ntljs4114n 30v 35m wdfn6 r1 is a 6.2k resistor and must be rated for the power dis - sipated during maximum overvoltage. in an overvoltage condition the ovsens pin will be clamped at 6v. r1 must be sized appropriately to dissipate the resultant power. for example, a 1/10w 6.2k resistor can have at most (pmax ? 6.2k) = 25v applied across its terminals. with the 6v at ovsens, the maximum overvoltage magnitude that this resistor can withstand is 31v. a 1/4w 6.2k resis - tor raises this value to 45v. ovsenss absolute maximum current rating of 10ma imposes an upper limit of 68v protection. reverse voltage protection the ltc4160/ltc4160-1 can also be easily protected against the application of reverse voltages, as shown in figure 6. d1 and r1 are necessary to limit the maximum v gs seen by mp1 during positive overvoltage events. d1s breakdown voltage must be safely below mp1s bvgs. the circuit shown in figure 6 offers forward voltage protection up to mn1s bvdss and reverse voltage protection up to mp1s bvdss. figure 5. overvoltage protection figure 6. dual polarity voltage protection r1 usb/wall adapter 41601 f05 c1 mn1 v bus ovsens ovgate ltc4160/ ltc4160-1 battery charger over programming the usb high power specifcation allows for up to 2.5w to be drawn from the usb port. the ltc4160/ltc4160 - 1s bidirectional switching regulator in step-down mode con- verts the voltage at v bus to a voltage just above bat on v out , while limiting power to less than the amount pro - grammed at clprog. the charger should be programmed (with the prog pin) to deliver the maximum safe charging current without regard to the usb specifcations. if there is insuffcient current available to charge the battery at the programmed rate, the charge current will be reduced until the system load on v out is satisfed and the v bus cur - rent limit is satisfed. programming the charger for more r2 r1 usb/wall adapter 41601 f06 c1 d1 mn1 mp1 v bus positive protection up to bvdss of mn1 v bus negative protection up to bvdss of mp1 v bus ovsens ovgate ltc4160/ ltc4160-1
ltc4160/ltc4160-1 23 41601fa applications information current than is available will not cause the average input current limit to be violated. it will merely allow the battery charger to make use of all available power to charge the battery as quickly as possible, and with minimal dissipa - tion within the charger. battery charger stability considerations the ltc4160/ltc4160-1s battery charger contains both a constant-voltage and a constant-current control loop. the constant-voltage loop is stable without any compensation when a battery is connected with low impedance leads. excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1f from bat to gnd. high value, low esr mlccs reduce the constant-voltage loop phase margin, possibly resulting in instability. up to 22f may be used in parallel with a battery, but larger capacitors should be decoupled with 0.2? to 1? of series resistance. furthermore, a 100f capacitor in series with a 0.3? re - sistor from bat to gnd is required to prevent oscillation when the battery is disconnected. in constant-current mode, the prog pin is in the feed - back loop rather than the battery voltage. because of the additional pole created by any prog pin capacitance, capacitance on this pin must be kept to a minimum. with no additional capacitance on the prog pin, the charger is stable with program resistor values as high as 25k. however, additional capacitance on this node reduces the maximum allowed program resistor. the pole frequency at the prog pin should be kept above 100khz. therefore, if the prog pin has a parasitic capacitance, c prog , the fol- lowing equation should be used to calculate the maximum resistance value for r prog : r kh zc p rog p rog 1 2 100 ?? alternate ntc thermistors and biasing the ltc4160/ltc4160-1 provide temperature qualifed charging if a grounded thermistor and a bias resistor are connected to ntc. by using a bias resistor whose value is equal to the room temperature resistance of the thermistor (r25) the upper and lower temperatures are pre-programmed to approximately 40c and 0c respec - tively assuming a vishay curve 1 thermistor. the upper and lower temperature thresholds can be ad- justed by either a modifcation of the bias resistor value or by adding a second adjustment resistor to the circuit. if only the bias resistor is adjusted, then either the upper or the lower threshold can be modifed but not both. the other trip point will be determined by the characteristics of the thermistor. using the bias resistor in addition to an adjustment resistor, both the upper and the lower tempera - ture trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. examples of each technique are given below. ntc thermistors have temperature characteristics which are indicated on resistance-temperature conversion tables. the vishay-dale thermistor nths0603n011-n1003f, used in the following examples, has a nominal value of 100k and follows the vishay curve 1 resistance-temperature characteristic. in the explanation below, the following notation is used. r25 = value of the thermistor at 25c r ntc|cold = value of the thermistor at the cold trip point r ntc|hot = value of the thermistor at the hot trip point r cold = ratio of r ntc|cold to r25 r hot = ratio of r ntc|hot to r25 r nom C primary thermistor bias resistor (see figure 7) r1 = optional temperature range adjustment resistor (see figure 8) the trip points for the ltc4160/ltc4160-1s temperature qualifcation are internally programmed at 0.349 ? ntcbias for the hot threshold and 0.765 ? ntcbias for the cold threshold.
ltc4160/ltc4160-1 24 41601fa therefore, the hot trip point is set when: r rr nt cbias nt cbias nt c hot nom nt c hot + = ?. ? 0 349 and the cold trip point is set when: r rr nt cbias nt cbias nt cc ol d nom nt cc ol d + = ?. ? 0 765 solving these equations for r ntc|cold and r ntc|hot results in the following: r ntc|hot t3 nom and r ntc|cold t3 nom by setting r nom equal to r25, the above equations result in r hot = 0.536 and r cold = 3.25. referencing these ratios to the vishay resistance-temperature curve 1 chart gives a hot trip point of about 40c and a cold trip point of about 0c. the difference between the hot and cold trip points is approximately 40c. by using a bias resistor, r nom , different in value from r25, the hot and cold trip points can be moved in either direction. the temperature span will change somewhat due to the non-linear behavior of the thermistor. the fol - lowing equations can be used to calculate a new value for the bias resistor: r r r r r r nom hot nom co ld = = 0 536 25 32 5 25 . ? . ? where r hot and r cold are the resistance ratios at the de - sired hot and cold trip points. note that these equations are linked. therefore, only one of the two trip points can be chosen, the other is determined by the default ratios designed in the ic. consider an example where a 60c hot trip point is desired. from the vishay curve 1 r-t characteristics, r hot is 0.2488 at 60c. using the above equation, r nom should be set to 46.4k. with this value of r nom , r cold is 1.436 and the cold trip point is about 16c. notice that the span is now 44c rather than the previous 40c. this is due to the decrease in temperature gain of the thermistor as absolute temperature increases. the upper and lower temperature trip points can be inde- pendently programmed by using an additional bias resistor, r1, as shown in figure 8. the following formulas can be used to compute the values of r nom and r1: r rr r rr r nom co ld hot nom hot = = ? . ? .? C? 2 714 25 10 536 r r2 5 for example, to set the trip points to 0c and 45c with a vishay curve 1 thermistor choose: rk k nom == 3 266 0 4368 2 714 100 104 2 .? . . ?. the nearest 1% value is 105k: 3tloftll the nearest 1% value is 12.7k. the fnal solution is shown in figure 8 and results in an upper trip point of 45c and a lower trip point of 0c. applications information figure 7. standard ntc confguration ? + ? + r nom 100k r ntc 100k ntc ntcbias 0.1v ntc_enable 41601 f07 ltc4160/ltc4160-1 ntc block too_cold too_hot 0.765 ? ntcbias 0.349 ? ntcbias ? + 3 4 t
ltc4160/ltc4160-1 25 41601fa applications information hot plugging and usb inrush current limiting the overvoltage protection circuit provides inrush current limiting due to the long time it takes for ovgate to fully enhance the n-channel mosfet. this prevents the current from building up in the cable too quickly and dampens out any resonant overshoot on v bus . it is possible to observe voltage overshoot on v bus when connecting the ltc4160/ltc4160-1 to a lab supply if the overvoltage protection circuit is not used. this overshoot is caused by the inductance of the long leads from the supply to v bus . twisting the wires together from the supply to v bus can greatly reduce the parasitic inductance of these long leads and keep v bus at a safe level. usb cables are generally manufactured with the power leads in close proximity and thus have fairly low parasitic inductance. hot plugging and usb on-the-go if there is more than 4.3v on v bus when on-the-go is enabled, the bidirectional switching regulator will not try to drive v bus . if usb on-the-go is enabled and an external supply is then connected to v bus , one of three things will happen depending on the properties of the external sup - ply. if the external supply has a regulation voltage higher than 5.1v, the bidirectional switching regulator will stop figure 8. modifed ntc confguration ? + ? + r nom 105k r ntc 100k r1 12.7k ntc ntcbias 0.1v ntc_enable 41601 f08 ltc4160/ltc4160-1 ntc block too_cold too_hot 0.765 ? ntcbias 0.349 ? ntcbias ? + 3 4 t switching and v bus will be held at the regulation voltage of the external supply. if the external supply has a lower regulation voltage and is capable of only sourcing current, then v bus will be regulated to 5.1v. the external supply will not source current to v bus . for a supply that can also sink current and has a regulation voltage less than 5.1v, the bidirectional switching regulator will source current into the external supply in an attempt to bring v bus up to 5.1v. as long as the external supply holds v bus to more than v out + 70mv, the bidirectional switching regulator will source up to 680ma into the sup - ply. if v bus is held to a voltage that is less than v out + 70mv then the short circuit timer will shut off the switching regulator after 7.2ms. the fault pin will then go low to indicate a short circuit current fault. v bus bypass capacitance and usb on-the-go session request protocol when two on-the-go devices are connected, one will be the a device and the other will be the b device depending on whether the device is connected to a micro-a or micro- b plug. the a device provides power to the b device and starts as the host. to prolong battery life, the a device can power down v bus when the bus is not being used. if the a device has powered down v bus , the b device can request the a device to power up v bus and start a new session using the session request protocol (srp). the srp consists of data-line pulsing and v bus pulsing. the b device must frst pulse the d + or d C data lines. the b device must then pulse v bus only if the a device does not respond to the data-line pulse. the a device is required to respond to only one of the pulsing methods. usb a devices that never power down v bus are not required to respond to the srp. for v bus pulsing, the limit on the v bus capacitance on the a device allows a b device to differentiate between a powered down on-the-go device and a powered down standard host. the b device will send out a pulse of current that will raise v bus to a voltage between 2.1 and 5.25v if connected to an on-the-go a device which must have no more than 6.5f. an on-the-go a device must drive v bus as soon as the current pulse raises v bus above 2.1v if the device is capable of responding to v bus pulsing.
ltc4160/ltc4160-1 26 41601fa applications information this same current pulse must not raise v bus any higher than 2v when connected to a standard host which must have at least 96f. the 96f for a standard host represents the minimum capacitance with v bus between 4.75v and 5.25v. since the srp pulse must not drive v bus greater than 2v, the capacitance seen at these voltage levels can be greater than 96f, especially if mlccs are used. therefore, the 96f represents a lower bound on the standard host bypass capacitance for determining the amplitude and duration of the current pulse. more capacitance will only decrease the maximum level that v bus will rise to for a given current pulse. figure 9 shows an on-the-go device using the ltc4160/ ltc4160-1 acting as the a device. additional capacitance can be placed on the v bus pin of the ltc4160/ltc4160- 1 when using the overvoltage protection circuit. the b device may not be able to distinguish between a powered down ltc4160/ltc4160-1 with overvoltage protection and a powered down standard host because of this extra capacitance. in addition, if the srp pulse raises v bus above its uvlo threshold of 4.3v the ltc4160/ltc4160-1 will assume input power is available and will not attempt to drive v bus . therefore, it is recommended that an on- the-go device using the ltc4160/ltc4160-1 respond to data-line pulsing. when an on-the-go device using the ltc4160/ltc4160-1 becomes the b device, as in figure 10, it must send out a data line pulse followed by a v bus pulse to request a session from the a device. the on-the-go device designer can choose how much capacitance will be placed on the v bus pin of the ltc4160/ltc4160-1 and then generate a v bus pulse that can distinguish between a powered down on-the-go a device and a powered down standard host. a suitable pulse can be generated because of the disparity in the bypass capacitances of an on-the-go a device and a standard host even if there is somewhat more than 6.5f capacitance connected to the v bus pin of the ltc4160/ltc4160-1. board layout considerations the exposed pad on the backside of the ltc4160/ ltc4160 - 1 package must be securely soldered to the pc board ground. this is the primary ground pin in the pack - age, and it serves as the return path for both the control circuitry and n-channel mosfet switch. furthermore, due to its high frequency switching circuitry, it is imperative that the input capacitor, inductor, and output capacitor be as close to the ltc4160/ltc4160-1 as pos - sible and that there be an unbroken ground plane under the ltc4160/ltc4160-1 and all of its external high frequency components. high frequency current, such as the v bus current tends to fnd its way on the ground plane along a mirror path directly beneath the incident path on the top of the board. if there are slits or cuts in the ground plane due to other traces on that layer, the current will be forced to go around the slits. if high frequency currents are not allowed to fow back through their natural least-area path, excessive voltage will build up and radiated emissions will occur (see figure 11). there should be a group of vias directly under the grounded backside leading directly down to an internal ground plane. to minimize parasitic inductance, the ground plane should be as close as pos - sible to the top plane of the pc board (layer 2). figure 9. ltc4160/ltc4160-1 as the a device on-the-go power manager on-the-go transceiver b device 41601 f11 a device d + d ? ovsens ovgate v bus c b <6.5f c a <6.5f without ovp ovp (optional) on-the-go transceiver ltc4160 / ltc4160-1 enotg
ltc4160/ltc4160-1 27 41601fa applications information figure 10. ltc4160/ltc4160-1 as the b device figure 11. higher frequency ground current follow their incident path. slices in the ground plane create large loop areas. the large loop areas increase the inductance of the path leading to higher system noise. the idgate pin for the external ideal diode controller has extremely limited drive current. care must be taken to minimize leakage to adjacent pc board traces. 100na of leakage from this pin will introduce an additional offset to the ideal diode of approximately 10mv. to minimize leakage, the trace can be guarded on the pc board by surrounding it with v out connected metal, which should generally be less than one volt higher than idgate. when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc4160/ltc4160-1: 1. the exposed pad of the package (pin 21) should connect directly to a large ground plane to minimize thermal and electrical impedance. 2. the trace connecting v bus to its respective decoupling capacitor should be as short as possible. the gnd side of these capacitors should connect directly to the ground plane of the part. these capacitors provide the ac current to the internal power mosfets and their drivers. it is critical to minimize inductance from these capacitors to the ltc4160/ltc4160-1. 3. connections between the powerpath switching regulator inductor and the output capacitor on v out should be kept as short as possible. use area flls whenever possible. the gnd side of the output capacitors should connect directly to the thermal ground plane of the part. 4. the switching power trace connecting sw to its respec - tive inductor should be minimized to reduce radiated emi and parasitic coupling. standard usb host or on-the-go power manager standard or on-the-go transceiver a device 41601 f12 b device d + d ? ovsens ovgate v bus c a <6.5f for otg devices >96f for standard host c b <6.5f without ovp ovp (optional) on-the-go transceiver ltc4160 / ltc4160-1 enotg 41601 f11
ltc4160/ltc4160-1 28 41601fa typical applications low component count switching battery charger with usb on-the-go low component count power manager/battery charger with usb on-the-go and low battery start-up v bus usb wall adapter usb on-the-go l1 3.3h to c system load c3 22f 0805 c2 0.1f 0402 17 8 13 1 2 15 16 5 7 3.01k 1k 41601 ta03 clprog 20 ntc prog ltc4160/ltc4160-1 sw encharger id 19 ntcbias 9 3 vbusgd chrg 4 fault v out idgate ldo3v3 bat 14 12 gnd 21 10 18 11 li-ion + c1 10f 0805 ovgate ovsens i lim0 i lim1 6 enotg c1: murata grm21br7a106ke51l c3: tayio yuden jmk212bj226mg l1: coilcraft lps4018-332lm v bus usb wall adapter usb on-the-go l1 3.3h to c system load c3 22f 0805 c2 0.1f 0402 17 8 13 1 2 15 16 5 7 3.01k 1k 41601 ta02 clprog 20 ntc prog ltc4160/ltc4160-1 sw encharger id 19 ntcbias 9 3 vbusgd chrg 4 fault v out idgate bat ldo3v3 14 12 gnd 21 10 11 18 li-ion + c1 10f 0805 ovgate ovsens i lim0 i lim1 6 enotg c1: murata grm21br7a106ke51l c3: tayio yuden jmk212bj226mg l1: coilcraft lps4018-332lm
ltc4160/ltc4160-1 29 41601fa typical applications high effciency power manager/battery charger with usb on-the-go, overvoltage protection and low battery start-up m2 v bus usb wall adapter usb on-the-go l1 3.3h m1 to c system load c3 22f 0805 c2 0.1f 0402 17 8 13 1 2 15 16 5 7 3.01k 1k 41601 ta04 clprog 20 ntc prog ltc4160/ltc4160-1 sw encharger id 19 ntcbias 9 3 vbusgd chrg 4 fault v out idgate bat ldo3v3 rtc 14 12 gnd 21 10 11 18 li-ion + 1f ovgate ovsens i lim0 i lim1 6 enotg c1, c3: tayio yuden jmk212bj226mg l1: coilcraft lps4018-332lm m1: fairchild fdn372s m2: siliconix si2333ds r1: 1/10 watt resistor r2: vishay curve 1 100k r1 6.2k r2 100k t 1k 1k 1k c1 22f 0805 high effciency switching battery charger with usb on-the-go, overvoltage and reverse-voltage protection to c 15 16 5 7 encharger id 19 ntcbias i lim0 i lim1 6 enotg 100k r2 100k t v bus usb wall adapter usb on-the-go l1 3.3h m2 c3 22f 0805 c2 0.1f 0402 17 8 13 1 2 3.01k 1k 41601 ta05 clprog 20 ntc prog ltc4160/ltc4160-1 sw 9 3 vbusgd chrg 4 fault v out idgate ldo3v3 bat system load 14 12 gnd 21 10 18 11 ovgate ovsens c1, c3: tayio yuden jmk212bj226mg l1: coilcraft lps4018-332lm m1: siliconix si2333ds m2: fairchild fdn372s r1: 1/10 watt resistor r2: vishay curve 1 r1 6.2k 10k 10k 10k m1 c1 22f 0805 to c li-ion +
ltc4160/ltc4160-1 30 41601fa 3.00 0.10 1.50 ref 4.00 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 19 20 1 2 bottom view?exposed pad 2.50 ref 0.75 0.05 r = 0.115 typ pin 1 notch r = 0.20 or 0.25 45 chamfer 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (udc20) qfn 1106 rev ? recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 2.50 ref 3.10 0.05 4.50 0.05 1.50 ref 2.10 0.05 3.50 0.05 package outline r = 0.05 typ 1.65 0.10 2.65 0.10 1.65 0.05 udc package 20-lead plastic qfn (3mm 4mm) (reference ltc dwg # 05-08-1742 rev ?) 2.65 0.05 0.50 bsc package description udc package 20-lead plastic qfn (3mm 4mm) (reference ltc dwg # 05-08-1742 rev ?)
ltc4160/ltc4160-1 31 41601fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 10/10 removal of pdc package and inclusion of udc package information in data sheet ltc4160epdc and ltc4160epdc-1 designated obsolete in order information section 1 to 32 2
ltc4160/ltc4160-1 32 41601fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 1010 rev a ? printed in usa related parts typical application part number description comments power management ltc3556 switching usb power manager with li-ion/polymer charger plus dual buck plus buck-boost dc/dc maximizes available power from usb port, bat-track, instant-on operation, 1.5a max charge current, 180m ideal diode with <50m option, 3.3v/25ma always-on ldo, two 400ma buck regulators, one 1a buck-boost regulator, 4mm 5mm 28-pin qfn package ltc3576/ ltc3576-1 switching usb power manager with usb on-the-go plus triple buck dc/dc maximizes available power from usb port, bat-track, 5v boost for usb on-the-go, instant-on operation, 1.5a max charge current, 180m ideal diode with <50m option, controller for external high voltage buck regulator, protection against transients of up to 68v, 3.3v/20ma always-on ldo, two 400ma and one 1a buck regulators, 4.1v float voltage (ltc3576-1), 4mm 6mm 38-pin qfn package ltc3586/ ltc3586-1 switching usb power manager with li-ion/polymer charger plus dual buck plus buck-boost plus boost dc/dc maximizes available power from usb port, bat-track, instant-on operation, 1.5a max charge current, 180m ideal diode with <50m option, 3.3v/25ma always-on ldo, two 400ma synchronous buck regulators, one 1a buck-boost regulator, one 600ma boost regulator, 4.1v float voltage (ltc3586-1) 4mm 6mm 38-pin qfn package ltc4098/ ltc4098-1 switching usb power manager and battery charger with overvoltage protection maximizes available power from usb port, bat-track, instant-on operation, 1.5a max charge current, 180m? ideal diode with <50m? option, controller for external high voltage buck regulator, protection against transients up to 68v, 4.1v float voltage (ltc4098-1), 4mm 3mm 20-pin qfn package ltc4099 i 2 c controlled usb power manager and battery charger with overvoltage protection maximizes available power from usb port, bat-track, instant-on operation, 1.5a max charge current, 180m? ideal diode with <50m? option, controller for external high voltage buck regulator, protection against transients of up to 68v, i 2 c control of input/charge current and float voltage with status read back, 4mm 3mm 20-pin qfn package power manager/battery charger with automatic usb on-the-go and overvoltage protection to c 15 16 6 7 encharger enotg 19 ntcbias i lim0 i lim1 5 id to usb transceiver j1 micro-ab v bus usb on-the-go l1 3.3h m1 c3 22f 0805 c2 0.1f 0402 17 8 13 1 2 3.01k 1k 41601 ta06 clprog 20 ntc prog ltc4160/ltc4160-1 sw 9 3 vbusgd chrg 4 fault v out idgate bat v bus d ? d + id gnd ldo3v3 rtc system load 14 12 gnd 21 10 11 18 li-ion + 1f ovgate ovsens c1, c3: tayio yuden jmk212bj226mg j1: hirose zx62-ab-5pa l1: coilcraft lps4018-332lm m1: fairchild fdn372s m2: siliconix si2333ds r1: 1/10 watt resistor v bus powers up when id pin has less than 10 to gnd (micro-a plug connected) r1 6.2k 10k 10k 10k c1 22f 0805 to c m2

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